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november 2014 docid10240 rev 2 1/17 17 AN1897 application note vipower?: low-cost universal input dvd supply with the viper22a-e introduction in the past few years, many consumer products have been provided to the end user, such as dvd or vcd players. generally, their power supply requires multiple outputs to supply a variety of control circuits: mcu, motor, amplifier, vfd. offline switch mode power supply regulators from st?s viper ? family combine high voltage, avalanche rugged vertical power mosfet with current mode control pwm circuitry. the result is the innovative ac-dc converter, simpler, quicker, with reduced component count and cheap. the viper family complies with the ?blue angel? and ?energy star? norms, with very low total power consumption in standby mode, thanks to the burst operation. this document presents the application on dvd player power supply with the viper22a-e meeting the specifications in ta ble 1 . figure 1. viper22a-e evaluation board table 1. output specifications input output 1 output 2 output 3 output 4 output 5 output 6 universal line 5 v+/- 5% (1) 1. the accuracy of +/-5% is reached for a range of load combination only. see section 3.2 for cross- regulation results. +12 v+/- 5% (1) -12 v+/- 5% (1) -26 v+/- 5% (1) 3.3 v+/- 5% (1) 5 v stb +/- 5% (1) min. 85 v ac max. 265 v ac imin. 20 ma imax.1.5 a imax. 30 ma imax. 30 ma imax.50 ma imax. 150 ma imax.100 ma www.st.com
contents AN1897 2/17 docid10240 rev 2 contents 1 application description and design . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 1.1 schematics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 1.1.1 start-up phase . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 1.1.2 auxiliary supply . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 1.1.3 burst mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 1.1.4 feedback loop . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 1.1.5 primary driver . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 1.2 transformer consideration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 2 layout recommendation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 3 experimental results . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 3.1 efficiency . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 3.2 regulation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 4 transformer specification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 5 pcb layout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 6 revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
docid10240 rev 2 3/17 AN1897 application description and design 17 1 application description and design 1.1 schematics the overall schematic is shown in figure 3 . 1.1.1 start-up phase the viper22a-e has an integrated high voltage current source linked to the drain pin. at the start-up converter, it charges the v dd capacitor until it reaches the start-up level (14.5 v), and the viper22a-e starts switching. 1.1.2 auxiliary supply the viper22a-e has a wide operating voltage range from 8 v to 42 v, respectively minimum and maximum values for undervoltage and overvoltage protections. this function is very useful to achieve low standby total power consumption. the feedback loop is connected to 5 v output by d12 to regulate 5 v output. +5 v stb output is blocked by q3, so +5 v stb regulation is neglected. when the standby signal is present, the q3 v ce cannot provide enough voltage to maintain d12 conducted, so the 5 v output is blocked, and the +5 v stb output is connected to the feedback loop. in this condition the +5 v stb is regulated. thanks to the transformer structure, all the other secondary outputs and the auxiliary voltages are pulled down to a very low level, also pulling down the total power consumption. these features are below-indicated. ? in normal full load, the vdd voltage must be lower than the overvoltage protection. ? in short-circuit, the vdd voltage must be lower than the shutdown voltage. actually, this condition leads to the well-known hiccup mode. ? in no-load condition, the vdd voltage must be higher than the shutdown voltage. 1.1.3 burst mode the viper22a-e integrates a current mode pwm with a power mosfet and includes the leading edge blanking function. the burst mode allows the viper22a-e to skip some switching cycles when the energy drained by the output load goes below e = (t b *v in )2 * f sw /2l p (t b = blanking time, v in = dc input voltage, f sw = switching frequency, lp = primary inductance). the consequence is the reduction of the switching losses in case of low load condition by reducing the switching frequency. 1.1.4 feedback loop the 5 v output voltage is regulated by a tl-431 (u3) via an optocoupler (u2) to the feedback pin. if the output voltage is high, the tl-431 draws more current through its cathode to the anode and the current increases in the optocoupler diode. the current in optocoupler npn increases accordingly and the current into the viper22a-e fb pin increases. when the fb current increases, the viper22a-e skips some cycles to decrease turn-on time and lower the output voltage to the proper level (see figure 1 ). the 5 v output voltage is regulated thanks to the tl-431 reference voltage and the r8 and r9 resistive dividers.
application description and design AN1897 4/17 docid10240 rev 2 figure 2. viper22a-e fb pin internal structure 1.1.5 primary driver in a flyback power supply, the transformer is used as an energy tank during the on-time of the mosfet. when the mosfet turns off, its drain voltage rises from a low value to the input voltage while the secondary diode conducts, transferring to the secondary side the magnetic energy stored in the transformer. since primary and secondary windings are not magnetically coupled, there is a serial leakage inductance that behaves like an open inductor charged at ipk, causing the voltage spikes on the mosfet drain. these voltage spikes must be clamped to keep the viper22a-e drain voltage below the bv dss (730 v) rating. if the peak voltage is higher than this value, the device is destroyed. the rcd clamp (see figure 4 ) is a very simple and cheap solution, but it impacts on the efficiency and on the power dissipation in standby condition. besides, the clamping voltage varies according to the load current. rcd clamp circuits may allow the drain voltage to exceed the breakdown rating of the viper22a-e during the overload operation or during turn-on with high line ac input voltage. a zener clamp is recommended (see figure 5 ). however this solution gives higher power dissipation at full load, even if the clamp voltage is exactly defined. 1.2 transformer consideration on the electrical specifications of a multiple output transformer (cross-regulation, leakage inductance), the main efforts focused on the proper coupling between the windings. a lower leakage inductance transformer allows a lower power clamp to reduce the input power. it l leads to lower power dissipation on the primary side. auxiliary and secondary windings are swapped in order to decrease the coupling to the primary one. the secondary windings act as a shielding layer to reduce the capacitive coupling. fewer spikes are generated on the auxiliary windings, the primary and secondary windings have better coupling. n+] 26&,//$725 3:0 /$7&+ 6 4 5 9 ,g '5$,1 6285&( )% 5 5 & 9gg 6hfrqgdu\ ihhgedfn , )% ,v n : :
docid10240 rev 2 5/17 AN1897 application description and design 17 designing transformers for low leakage inductance involves several considerations: ? minimizing the number of turns ? keeping ratio of winding height to width small ? increasing width of windings ? minimizing the insulation between windings ? increasing coupling between windings
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docid10240 rev 2 7/17 AN1897 application description and design 17 for safety requirements, a leakage inductance value is 1 to 3% of the open circuit primary inductance. a high efficiency transformer should have low inter-winding capacitance to decrease the switching losses. energy stored in the parasitic capacitance of the transformer is absorbed by the viper22a-e cycle-by-cycle during the turn-on transition. excess capacitance also rings with stray inductance during switch transitions, causing noise problems. capacitance effects are usually the most important in the primary winding, where the operating voltage (and consequent energy storage) is high. the primary winding should be the first winding on the transformer. this allows the primary winding to have a short length per turn, reducing the internal capacitance. the driven end of the primary winding (the end connected to the drain pin) should be the beginning of the winding rather than the end. this takes advantage of the shielding effect of the second half of the primary winding and reduces capacitive coupling to adjacent windings. a layer of insulation between adjacent primary windings can cut the internal capacitance of the primary winding by a four factor, with consequent reduction of losses. a common technique for winding multiple secondaries with the same polarity sharing a common return, is to stack the secondaries (see figure 6 ). this arrangement improves the load regulation, and reduces the total number of secondary turns. commonly a clamper based on an rcd network or a diode with a zener to clamp the rise of the drain voltage is used. figure 6. multiple output winding figure 4. rcd clamp topology figure 5. zener clamp topology
layout recommendation AN1897 8/17 docid10240 rev 2 2 layout recommendation since emi issues are strongly related to layout, a basic rule has to be taken into account in high current path routing, (the current loop area has to be minimized). if a heatsink is used it has to be connected to ground to reduce common mode emissions, since it is close to the floating drain tab. besides, in order to avoid any noise interference on the viper22a-e logic pin, the control ground has to be separated from power ground.
docid10240 rev 2 9/17 AN1897 experimental results 17 3 experimental results 3.1 efficiency figure 7. efficiency at 230 v ac (load on 5 v) figure 8. efficiency at 260 v ac (load on 5 v) 9p$9p$9p$ 9$ $ $ $ $ $ (iilflhqf\ (iilflhqf\dw9df0dlqv,qsxw 9p$9p$9p$ 9$ $ $ $ $ $ (iilflhqf\ (iilflhqf\dw9df,qsxw figure 9. efficiency at 85 v ac (load on 5 v) figure 10. load regulation (load on + 5 v) 9p$9p$9p$ 9$ $ $ $ $ $ (iilflhqf\ (iilflhqf\dw9df,qsxw $ $ $ $ $ $ /rdg$ 9rowdjh 9/rdg5hjxdowlrq
experimental results AN1897 10/17 docid10240 rev 2 3.2 regulation figure 11. cross-regulation table 2. line regulation output 85 v ac 85 v ac 260 v ac 5 v/ 0.1 a 5.15 v 5.15 v 5.15 v 5 v stb / 0 a 5.15 v 5 15.15 v 5.15 v 12 v/ 0 a 12.08 v 12.11 v 12.12 v -12 v/ 0 a -11.98 v -11.99 v -12.00 v -26 v/ 0 a -25.82 v -25.85 v -25.86 v 3.3 v/ 0 a 3.87 v 3.87 v 3.88 v 9$ p$ p$ p$ p$ p$ p$ /rdgp$ 9rowdjh 9 9 9 9 table 3. standby model output 85 v ac 230 v ac 260 v ac 5 v 2.05 v 2.05 v 2.07 v 5 v stb (100 ma) 5.08 v 5.11 v 5.14 v 12 v 4.00 v 3.99 v 3.98 v -12 v 3.99 v 3.99 v 3.98 v -26 v 9.12 v 9.10 v 9.08 v 3.3 v 1.70 v 1.50 v 1.51 v pdis0.8 w1 w1.1 w
docid10240 rev 2 11/17 AN1897 experimental results 17 table 4. full load regulation output 85 v ac 230 v ac 260 v ac 5 v/ 1.5 a 5.02 v 5.09 v 5.08 v 5 v stb / 0 a 5.02 v 5.09 v 5.08 v 12 v/30 ma 12.03 v 12.06 v 12.05 v -12 v/30 ma -12.01 v -12.05 v -12.05 v -26 v/50 ma -26.06 v -26.16 v -26.15 v 3.3 v/0.15 a 3.77 v 3.80 v 3.78 v viper22a-e temp 53 c 47 c 45 c
transformer specification AN1897 12/17 docid10240 rev 2 4 transformer specification figure 12. transformer structure figure 13. winding construction diagram 3ulpdu\lqgxfwdqfh /s p+n+]9 /hdndjhlqgxfwdqfh /nx+dwvhfrqgdu\ dqgdx[loldu\zlqglqjvkruwn+]9 &ruh ((5/ %reelq (5slq 9hqgru <xdq'rqj'dhohfwurqlfv&r/wg table 5. winding parameters layer description symbol start pin end pin number of layers tu r n s wire size (mm) primary wp pin 2 pin 1 2 65 0.3 out 1 (5 v/1.5 a) w5 pin 7 pin 12 1 4 2*0.6 out 2 (12 v/0.0 3 a) w12 pin 11 pin 7 1 5 0.3 out 3 (-12 v/0.0 3 a) w-12 pin 12 pin 10 1 9 0.45 out 4 (-26 v/0.05 a) w-26 pin1 0 pin 13 1 10 0.3 out 5 (5 v stb /0. 1 a) wstb pin 9 pin 8 1 12 0.3 out 6 (3. 3v/0.15 a) w3v3 pin 14 pin 15 1 3 0.3 auxiliary waux pin 6 pin 5 1 24 0.3 %duulhupp %reelq :s : : : : :y :vwe :dx[ %duulhupp
docid10240 rev 2 13/17 AN1897 pcb layout 17 5 pcb layout figure 14. bottom view of the evaluation board (not in scale) figure 15. pcb art work (not in scale)
pcb layout AN1897 14/17 docid10240 rev 2 table 6. bill of materials reference description note u1 optocoupler pc817 sharp u2 viper22a-e dip st u3 tl431 acz st u4 l4931 abv33 st q1 ss9014 q3 ss8550 d1, d2, d3, d4 1n4007 d5 fr157 d6, d7, d9, d10, d13 stth102 st d8 stps5l60 st d11, d12 1n5818 st c1, c2 y1 capacitor 2200 pf c3 x2 capacitor 0.1 uf c4 electrolytic capacitor 100 uf/400 v c5, c8 1 nf/1 kv c6 ceramic capacitor 47 nf/50 v c7 electrolytic capacitor 47 uf/50 v c9 electrolytic capacitor 220 uf/50 v c10 ceramic capacitor 47 pf/50v c12 electrolytic capacitor 1000 uf/16 v c13 electrolytic capacitor 470 uf/16 v c15 electrolytic capacitor 100 uf/10 v c17 electrolytic capacitor 470 uf/25 v c19 electrolytic capacitor 470 uf/25 v c20 electrolytic capacitor 220 uf/50 v c25 electrolytic capacitor 220 uf/16 v rt1 not fit r2 9.1 k ? w r3 100 k 1 w r4, r5, r6 1 k? w r8, r9 5.1 k? w r11 680 ? w ch1 2.2 mh common choke tx1 eer28 transformer
docid10240 rev 2 15/17 AN1897 pcb layout 17 f1 fuse 1 a j1, j2 2-pin connector j3 5-pin connector j4 4-pin connector j5 9-pin connector table 6. bill of materials (continued) reference description note
revision history AN1897 16/17 docid10240 rev 2 6 revision history table 7. document revision history date revision changes 12-nov-2014 2 updated the title in cover page. content reworked to improve readability, no technical changes.
docid10240 rev 2 17/17 AN1897 17 important notice ? please read carefully stmicroelectronics nv and its subsidiaries (?st?) reserve the right to make changes, corrections, enhancements, modifications, and improvements to st products and/or to this document at any time without notice. purchasers should obtain the latest relevant in formation on st products before placing orders. st products are sold pursuant to st?s terms and conditions of sale in place at the time of o rder acknowledgement. purchasers are solely responsible for the choice, selection, and use of st products and st assumes no liability for application assistance or the design of purchasers? products. no license, express or implied, to any intellectual property right is granted by st herein. resale of st products with provisions different from the information set forth herein shall void any warranty granted by st for such product. st and the st logo are trademarks of st. all other product or service names are the property of their respective owners. information in this document supersedes and replaces information previously supplied in any prior versions of this document. ? 2014 stmicroelectronics ? all rights reserved

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